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Course Description

Joint Entrance Examination (JEE) is an all India common engineering entrance examination which is conducted for admission in various engineering colleges and courses all over the country.

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Course Syllabus
  • Digital Signals and Logic Gates (GA_LG01B)
  • Logic Gates (GA_LG02A)
  • Truth Table of Logic Gates (GA_LG03A)
  • NOT Gate (GA_LG04A)
  • OR Gate (GA_LG05A)
  • Waveform Analysis of OR Gate (GA_LG06A)
  • AND Gate (GA_LG07A)
  • Waveform Analysis of AND Gate (GA_LG08A)
  • Input-Output Relationship for Basic Gates (GA_LG08XA)
  • NAND Gate (GA_LG09A)
  • Waveform Analysis of NAND Gate (GA_LG10A)
  • Implementing NOT Gate using NAND Gate (GA_LG10XA)
  • Implementing AND Gate using NAND Gates (GA_LG10YA)
  • Implementing OR Gate using NAND Gates (GA_LG10ZA)
  • NOR Gate (GA_LG11A)
  • Waveform Analysis of NOR Gate (GA_LG12A)
  • Implementing NOT Gate using NOR Gate (GA_LG12XA)
  • Implementing OR Gate using NOR Gates (GA_LG12YA)
  • Implementing AND Gate using NOR Gates (GA_LG12ZA)

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