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Course Description

Very-large-scale integration (VLSI) is the process of creating an integrated circuit (IC) by combining thousands of transistors into a single chip. VLSI began in the 1970s when complex semiconductor and communication technologies were being developed.

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Course Syllabus
  • Mod-01 Lec-01 Introduction to Digital VLSI Design Flow
  • Mod-01 Lec-02 High Level Design Representation
  • Mod-01 Lec-03 Transformations for High Level Synthesis
  • Mod-02 Lec-01 Introduction to HLS: Scheduling, Allocation and Binding Problem
  • Mod-02 Lec-02 Scheduling Algorithms-1
  • Mod-02 Lec-03 Scheduling Algorithms-2
  • Mod-02 Lec-04 Binding and Allocation Algorithms
  • Mod-03 Lec-01 Two level Boolean Logic Synthesis-1
  • Mod-03 Lec-02 Two level Boolean Logic Synthesis-2
  • Mod-03 Lec-03 Two level Boolean Logic Synthesis-3
  • Mod-03 Lec-04 Heuristic Minimization of Two-Level Circuits
  • Mod-03 Lec-05 Finite State Machine Synthesis
  • Mod-03 Lec-06 Multilevel Implementation
  • Mod-04 Lec-01 Introduction to formal methods for design verification
  • Mod-04 Lec-02 Temporal Logic: Introduction and Basic Operators
  • Mod-04 Lec-03 Syntax and Semantics of CTL
  • Mod-04 Lec-04 Syntax and Semantics of CTL -- Continued
  • Mod-04 Lec-05 Equivalence between CTL Formulas
  • Mod-05 Lec-01 Introduction to Model Checking
  • Mod-05 Lec-02 Model Checking Algorithms I
  • Mod-05 Lec-03 Model Checking Algorithms II
  • M Lec-04 Model Checking with Fairness
  • Mod-06 Lec-01 Binary Decision Diagram: Introduction and construction
  • Mod-06 Lec-02 Ordered Binary Decision Diagram
  • Mod-06 Lec-03 Operation on Ordered Binary Decision Diagram
  • Mod-06 Lec-04 Ordered Binary Decision Diagram for State Transition Systems
  • Mod-06 Lec-05 Symbolic Model Checking
  • Mod-07 Lec-01 Introduction to Digital VLSI Testing
  • Mod-07 Lec-02 Functional and Structural Testing
  • Mod-07 Lec-03 Fault Equivalence
  • Mod-08 Lec-01 Fault Simulation-1
  • Mod-08 Lec-02 Fault Simulation-2
  • Mod-08 Lec-03 Fault Simulation-3
  • Mod-08 Lec-04 Testability Measures (SCOAP)
  • Mod-09 Lec-01 Introduction to Automatic Test Pattern Generation (ATPG) and ATPG Algebras
  • Mod-09 Lec-02 D-Algorithm-1
  • Mod-09 Lec-03 D-Algorithm-2
  • Mod-10 Lec-01 ATPG for Synchronous Sequential Circuits
  • Mod-10 Lec-02 Scan Chain based Sequential Circuit Testing-1
  • Mod-10 Lec-03 Scan Chain based Sequential Circuit Testing-2
  • Mod-11 Lec-01 Built in Self Test-1
  • Mod-11 Lec-02 Built in Self Test-2
  • Mod-11 Lec-03 Memory Testing-1
  • Mod-11 Lec-04 Memory Testing-2

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